Memory-Efficient Depthwise Convolution Accelerator with Run-Length Coding

In resource-constrained environments such as embedded systems, AI computations are limited by storage capacity and data transfer overhead. This paper proposes a hardware accelerator to reduce the memory usage of activation data for depthwise convolution in MobileNet-V1. In comparison with various compression algorithms, run-length coding (RLC) showed the highest compression ratio in almost all layers, and the memory usage was reduced by up to 69.29% when using RLC compared to uncompressed data. The hardware accelerator performs not only computation but also compression and decompression, whereas the software measures only computation. Nevertheless, the total execution time of the hardware was lower than that of the software. These results demonstrate that the proposed hardware accelerator can reduce memory usage without incurring processing time overhead from compression and decompression, making it suitable for embedded AI applications.