Novel Dual Liner Process for Side-Shielded Forksheet Device with Superior Design Margin

In this article, for the first time, we proposed the side-shielded forksheet (S-FS) device to sustain extreme device scaling and to expand device design margins. Through the process simulations calibrated based on transmission electron microscopy (TEM) dimensions of the process integration modules, it is verified that n/p-type nanosheet (NS)-shaped stacked channel devices are physically isolated in the S-FS by the dielectric wall formed by the proposed dual liner process scheme (DLS). In addition, distributed correlation is rigorously analyzed by 3-D technology computer aided design (TCAD) device simulations with precisely calibrated models. As a result, it is revealed that the S-FS shows the superior electrical characteristics and design margin compared to the conventional forksheet (C-FS) device when structural variation and work function (WF) fluctuation are considered in extremely scaled devices.