TY - GEN
T1 - PCMCsim
T2 - 2022 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2022
AU - Lee, Hyokeun
AU - Kim, Hyungsuk
AU - Shim, Seokbo
AU - Lee, Seungyong
AU - Hong, Dosun
AU - Lee, Hyuk Jae
AU - Kim, Hyun
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - With the growing demand for technology scaling and storage capacity in data centers, phase-change memory (PCM) has garnered attention as a next-generation nonvolatile memory (NVM). However, an accurate simulator that includes the necessary hardware features for PCM is not available, lagging behind current PCM technology. In this study, a functional and cycle-accurate PCM controller simulator, called PCMCsim, is presented to revitalize the related research. The proposed simulator incorporates necessary features for current PCM products and the latest DDR5 specifications. Based on rigorous performance analysis, this study characterizes bottlenecks of the PCM subsystem by sweeping hardware parameters, providing important takeaway messages to designers. Furthermore, the latency is significantly reduced by introducing a dedicated prefetcher into the address translation module. The proposed simulator is validated against a command trace made by a PCM product developer. We release our simulator as open-source software, except for industry-confidential features.11https://github.com/harrylee365/pcmcsim-pub1ic
AB - With the growing demand for technology scaling and storage capacity in data centers, phase-change memory (PCM) has garnered attention as a next-generation nonvolatile memory (NVM). However, an accurate simulator that includes the necessary hardware features for PCM is not available, lagging behind current PCM technology. In this study, a functional and cycle-accurate PCM controller simulator, called PCMCsim, is presented to revitalize the related research. The proposed simulator incorporates necessary features for current PCM products and the latest DDR5 specifications. Based on rigorous performance analysis, this study characterizes bottlenecks of the PCM subsystem by sweeping hardware parameters, providing important takeaway messages to designers. Furthermore, the latency is significantly reduced by introducing a dedicated prefetcher into the address translation module. The proposed simulator is validated against a command trace made by a PCM product developer. We release our simulator as open-source software, except for industry-confidential features.11https://github.com/harrylee365/pcmcsim-pub1ic
KW - address indirection table
KW - performance analysis
KW - Phase change memory
KW - simulator
UR - http://www.scopus.com/inward/record.url?scp=85134343180&partnerID=8YFLogxK
U2 - 10.1109/ISPASS55109.2022.00043
DO - 10.1109/ISPASS55109.2022.00043
M3 - Conference contribution
AN - SCOPUS:85134343180
T3 - Proceedings - 2022 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2022
SP - 300
EP - 310
BT - Proceedings - 2022 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2022
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 22 May 2022 through 24 May 2022
ER -