Performance evaluation of buffer replacement schemes for solid state drives

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

SSDs that consist of multiple NAND flash memory chips include RAM inside it to maintain the mapping table. Recently, several buffer management schemes that use a portion of the internal RAM as buffer have been presented. The goal of the work is to evaluate the performance of the representative buffer replacement schemes as to various sector mapping schemes. Trace-driven simulations show that LRU-based policy is effective by increasing hit ratio and that evicting a victim in a block unit is effective because it generates a sequential write pattern, which is NAND-friendly.

Original languageEnglish
Title of host publicationFuture Communication, Computing, Control and Management
Pages481-488
Number of pages8
EditionVOL. 2
DOIs
StatePublished - 2012
Event2011 International Conference on Future Communication, Computing, Control and Management, ICF4C 2011 - Phuket, Thailand
Duration: 16 Dec 201117 Dec 2011

Publication series

NameLecture Notes in Electrical Engineering
NumberVOL. 2
Volume142 LNEE
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119

Conference

Conference2011 International Conference on Future Communication, Computing, Control and Management, ICF4C 2011
Country/TerritoryThailand
CityPhuket
Period16/12/1117/12/11

Keywords

  • buffer replacement
  • LRU
  • NAND flash memory
  • Solid State Drives

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