Proposal for Improved Electrical Efficiency through Thermal Modeling of Interconnect Structure

Tae Yeong Hong, Seul Ki Hong

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This study investigated the modeling of heat and current distribution in interconnect structure used in semiconductor systems based on their shapes, utilizing Finite Element Method (FEM) simulations. Through experimental validation, the research aims to optimize power efficiency in interconnect structures. It identifies issues such as increased current density due to reduced contact area between metal lines and vias and temperature rise from Joule heating. The findings provide insights into considerations for reliably scaling down interconnect structures in semiconductor systems and can be widely applied to research aimed at enhancing reliability.

Original languageEnglish
Title of host publication2024 IEEE International Interconnect Technology Conference, IITC 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350385175
DOIs
StatePublished - 2024
Event2024 IEEE International Interconnect Technology Conference, IITC 2024 - San Jose, United States
Duration: 3 Jun 20246 Jun 2024

Publication series

Name2024 IEEE International Interconnect Technology Conference, IITC 2024

Conference

Conference2024 IEEE International Interconnect Technology Conference, IITC 2024
Country/TerritoryUnited States
CitySan Jose
Period3/06/246/06/24

Keywords

  • area ratio
  • current transmission optimization
  • high-density electronic devices
  • interconnect< reliability improvement

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