Reconfigurable Stochastic Computing Architecture for Computationally Intensive Applications

Jeongeun Kim, Yue Ri Jeong, Kwonneung Cho, Won Sik Jeong, Seung Eun Lee

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

The design of computation-intensive and complicated applications is limited by hardware resources. To realize efficient utilization of circuit area with lightweight computational logics and execute optimized operation, we propose an architecture of reconfigurable stochastic computing (SC) unit. The proposed SC unit decodes mathematical formula and reconfigures SC circuits to improve design productivity. Compared to the deterministic implementation, the proposed architecture reduces the circuit area by 39.7%.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2022, ISOCC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages61-62
Number of pages2
ISBN (Electronic)9781665459716
DOIs
StatePublished - 2022
Event19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of
Duration: 19 Oct 202222 Oct 2022

Publication series

NameProceedings - International SoC Design Conference 2022, ISOCC 2022

Conference

Conference19th International System-on-Chip Design Conference, ISOCC 2022
Country/TerritoryKorea, Republic of
CityGangneung-si
Period19/10/2222/10/22

Keywords

  • Area efficient
  • Reconfigurable
  • Stochastic Computing

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