TY - GEN
T1 - Regression Model-based VCO Design Optimization Technique
AU - Hyun, Jin Won
AU - Nam, Jae Won
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - Along with technology advancements, implementing digital signal processing has become easier through digital circuit design automation. However, an analog circuit has too many obstacles to adopt a design automation flow in a scaled-down technology due to the relatively increased PVT (process-voltage-temperature) variations and enlarged mismatch errors, thus requiring a careful full-custom analog circuit design or employing an intensive back-end digital calibration engine. In this study, we implement an analog circuit design flow that quickly finds the optimal design point enabled by a high-level simulator programmed in Ocean scripts with a machine learning algorithm. To reduce the analog design effort, we train an ANN regression model that predicts the top-performing candidates with reasonable SPICE simulations in a supervised learning process. Here, we aimed to design a ring oscillator in the 65nm CMOS process. By using the proposed analog design automation strategy, we focused on jitter-power figure-of-merit (FOMJ) optimization, resulting in 99.84% accuracy of the final performance in comparison with SPICE simulation.
AB - Along with technology advancements, implementing digital signal processing has become easier through digital circuit design automation. However, an analog circuit has too many obstacles to adopt a design automation flow in a scaled-down technology due to the relatively increased PVT (process-voltage-temperature) variations and enlarged mismatch errors, thus requiring a careful full-custom analog circuit design or employing an intensive back-end digital calibration engine. In this study, we implement an analog circuit design flow that quickly finds the optimal design point enabled by a high-level simulator programmed in Ocean scripts with a machine learning algorithm. To reduce the analog design effort, we train an ANN regression model that predicts the top-performing candidates with reasonable SPICE simulations in a supervised learning process. Here, we aimed to design a ring oscillator in the 65nm CMOS process. By using the proposed analog design automation strategy, we focused on jitter-power figure-of-merit (FOMJ) optimization, resulting in 99.84% accuracy of the final performance in comparison with SPICE simulation.
KW - analog circuit design automation
KW - ANN
KW - machine learning
KW - ocean script
KW - voltage-controlled-oscillator
UR - http://www.scopus.com/inward/record.url?scp=85150471168&partnerID=8YFLogxK
U2 - 10.1109/ICEIC57457.2023.10049908
DO - 10.1109/ICEIC57457.2023.10049908
M3 - Conference contribution
AN - SCOPUS:85150471168
T3 - 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
BT - 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
Y2 - 5 February 2023 through 8 February 2023
ER -