Relation between resistance and capacitance in atomically dispersed Pt-SiO₂ thin films for multilevel resistance switching memory

Resistance switching memory cells were fabricated using atomically dispersed Pt-SiO₂ thin film prepared via RF co-sputtering. The memory cell can switch between a low-resistance-state and a high-resistance-state reversibly and reproducibly through applying alternate voltage polarities. Percolated conducting paths are the origin of the low-resistance-state, while trapping electrons in the negative U-center in the Pt-SiO₂ interface cause the high-resistance-state. Intermediate resistance-states are obtained through controlling the compliance current, which can be applied to multi-level operation for high memory density. It is found that the resistance value is related to the capacitance of the memory cell: a 265-fold increase in resistance induces a 2.68-fold increase in capacitance. The exponential growth model of the conducting paths can explain the quantitative relationship of resistance-capacitance. The model states that the conducting path generated in the early stage requires a larger area than that generated in the last stage, which results in a larger decrease in the capacitance.