TY - GEN
T1 - ReRAM Switching Performance based on Single-Walled Carbon Nanotubes Wire Electrode
AU - Jang, Dong Jun
AU - Jo, Beomso
AU - Kim, Young Lae
AU - Kwon, Min Woo
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - From the past, the occurrence of bottlenecks in memory/computation functions has been a problem for Von Neumann architecture. As the demand for computing and data storage increases, it is necessary to develop high-performance memory to overcome the limitations of operating speed and low power consumption. Recently, neuromorphic systems have been in the spotlight with computing technology that imitates the human brain. Neuromorphic architecture can be an important factor in implementing spike neural network (SNN) - based system hardware with human synaptic learning. Among the candidates for neuromorphic memory systems, resistive random-access memory (ReRAM) is attracting attention for its simple structure and easy design with silicon-based CMOS technology. By spike timing dependent plasticity (STDP), known as the learning rule of synapses, the change in the weight of synapses is equal to the change in the resistance of the synaptic ReRAM device.Therefore, this study proposed a nano-wire electrode based non-volatile synaptic devices with metal-CNTs-oxide-Si (MCOS) structure by synthesizing single-walled carbon nanotubes (SWCNTs). SWCNTs have excellent electrical properties as they include higher conductivity than copper and have carrier mobility than Si. As the top electrode wire was applied as SWCNTs, the leakage current was reduced, and the high switching performance was shown through self-integration of each cell. Ultimately, it will be an important parameter of device implementation that improves the reliability of memory and the stability of conductance filament (CF).
AB - From the past, the occurrence of bottlenecks in memory/computation functions has been a problem for Von Neumann architecture. As the demand for computing and data storage increases, it is necessary to develop high-performance memory to overcome the limitations of operating speed and low power consumption. Recently, neuromorphic systems have been in the spotlight with computing technology that imitates the human brain. Neuromorphic architecture can be an important factor in implementing spike neural network (SNN) - based system hardware with human synaptic learning. Among the candidates for neuromorphic memory systems, resistive random-access memory (ReRAM) is attracting attention for its simple structure and easy design with silicon-based CMOS technology. By spike timing dependent plasticity (STDP), known as the learning rule of synapses, the change in the weight of synapses is equal to the change in the resistance of the synaptic ReRAM device.Therefore, this study proposed a nano-wire electrode based non-volatile synaptic devices with metal-CNTs-oxide-Si (MCOS) structure by synthesizing single-walled carbon nanotubes (SWCNTs). SWCNTs have excellent electrical properties as they include higher conductivity than copper and have carrier mobility than Si. As the top electrode wire was applied as SWCNTs, the leakage current was reduced, and the high switching performance was shown through self-integration of each cell. Ultimately, it will be an important parameter of device implementation that improves the reliability of memory and the stability of conductance filament (CF).
UR - http://www.scopus.com/inward/record.url?scp=85150459958&partnerID=8YFLogxK
U2 - 10.1109/ICEIC57457.2023.10049931
DO - 10.1109/ICEIC57457.2023.10049931
M3 - Conference contribution
AN - SCOPUS:85150459958
T3 - 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
BT - 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
Y2 - 5 February 2023 through 8 February 2023
ER -