Abstract
To efficiently deploy machine learning applications to the edge, compute-in-memory (CIM) based hardware accelerator is a promising solution with improved throughput and energy efficiency. Instant-on inference is further enabled by emerging non-volatile memory technologies such as resistive random access memory (RRAM). This paper reviews the recent progresses of the RRAM based CIM accelerator design. First, the multilevel states RRAM characteristics are measured from a test vehicle to examine the key device properties for inference. Second, a benchmark is performed to study the scalability of the RRAM CIM inference engine and the feasibility towards monolithic 3D integration that stacks RRAM arrays on top of advanced logic process node. Third, grand challenges associated with in-situ training are presented. To support accurate and fast in-situ training and enable subsequent inference in an integrated platform, a hybrid precision synapse that combines RRAM with volatile memory (e.g. capacitor) is designed and evaluated at system-level. Prospects and future research needs are discussed.
| Original language | English |
|---|---|
| Article number | 9406197 |
| Pages (from-to) | 2753-2765 |
| Number of pages | 13 |
| Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
| Volume | 68 |
| Issue number | 7 |
| DOIs | |
| State | Published - Jul 2021 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- deep neural network
- hardware accelerator
- in-memory computing
- Non-volatile memory
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