@inproceedings{6f216ebe57d44717b1b817b50fbd3b82,
title = "SDRAM controller for retention time analysis in low power signal processor",
abstract = "The SDRAM requires the refreshing at every refresh time to maintain the data, and this operation consumes power. Because the power consumption of the processor is decreased, the power cosnumption on the SDRAM is taking large portion of the total power consumption. The refresh time can be expanded because the retention time and power consumption can be changed. In this paper we introduce the SDRAM controller which enables the analysis of the retention time for the power redectoin purpose.",
keywords = "Low-power design, Resilient design, SDRAM controller",
author = "Kim, {Sang Don} and Jeong, {Yeong Seob} and Lee, {Ju Seong} and Lee, {Seung Eun}",
year = "2013",
doi = "10.1007/978-81-322-1000-9_29",
language = "English",
isbn = "9788132209997",
series = "Lecture Notes in Electrical Engineering",
number = "VOL. 2",
pages = "303--309",
booktitle = "Proceedings of the Fourth International Conference on Signal and Image Processing 2012, ICSIP 2012",
edition = "VOL. 2",
note = "4th International Conference on Signal and Image Processing 2012, ICSIP 2012 ; Conference date: 13-12-2012 Through 15-12-2012",
}