Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance

Yeon Seok Kim; Chang Young Lim; Min Woo Kwon

doi:10.23919/SNW57900.2023.10183925

Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance

Yeon Seok Kim, Chang Young Lim, Min Woo Kwon

Electronic Engineering Program

Gangneung-Wonju National University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this paper, we propose a solution that involves adding a silicon nitride (Si3N4) layer to the spherical shallow trench isolation (STI) structure. By optimizing the spherical STI structure and adding the Si3N4 layer. The addition of Si3N4 is shown to cause a decrease in pass gate effect (PGE) based on the measurement results. The proposed structure reduced the PGE compared to the currently used BCAT structure.

Original language	English
Title of host publication	2023 Silicon Nanoelectronics Workshop, SNW 2023
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	61-62
Number of pages	2
ISBN (Electronic)	9784863488083
DOIs	https://doi.org/10.23919/SNW57900.2023.10183925
State	Published - 2023
Event	26th Silicon Nanoelectronics Workshop, SNW 2023 - Kyoto, Japan Duration: 11 Jun 2023 → 12 Jun 2023

Publication series

Name	2023 Silicon Nanoelectronics Workshop, SNW 2023

Conference

Conference	26th Silicon Nanoelectronics Workshop, SNW 2023
Country/Territory	Japan
City	Kyoto
Period	11/06/23 → 12/06/23

Access to Document

10.23919/SNW57900.2023.10183925

Cite this

Kim, Y. S., Lim, C. Y., & Kwon, M. W. (2023). Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance. In 2023 Silicon Nanoelectronics Workshop, SNW 2023 (pp. 61-62). (2023 Silicon Nanoelectronics Workshop, SNW 2023). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/SNW57900.2023.10183925

@inproceedings{536bafbdb4fb4112ae24439a90b0c5f0,

title = "Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance",

abstract = "In this paper, we propose a solution that involves adding a silicon nitride (Si3N4) layer to the spherical shallow trench isolation (STI) structure. By optimizing the spherical STI structure and adding the Si3N4 layer. The addition of Si3N4 is shown to cause a decrease in pass gate effect (PGE) based on the measurement results. The proposed structure reduced the PGE compared to the currently used BCAT structure.",

author = "Kim, \{Yeon Seok\} and Lim, \{Chang Young\} and Kwon, \{Min Woo\}",

note = "Publisher Copyright: {\textcopyright} 2023 JSAP.; 26th Silicon Nanoelectronics Workshop, SNW 2023 ; Conference date: 11-06-2023 Through 12-06-2023",

year = "2023",

doi = "10.23919/SNW57900.2023.10183925",

language = "English",

series = "2023 Silicon Nanoelectronics Workshop, SNW 2023",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "61--62",

booktitle = "2023 Silicon Nanoelectronics Workshop, SNW 2023",

}

Kim, YS, Lim, CY & Kwon, MW 2023, Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance. in 2023 Silicon Nanoelectronics Workshop, SNW 2023. 2023 Silicon Nanoelectronics Workshop, SNW 2023, Institute of Electrical and Electronics Engineers Inc., pp. 61-62, 26th Silicon Nanoelectronics Workshop, SNW 2023, Kyoto, Japan, 11/06/23. https://doi.org/10.23919/SNW57900.2023.10183925

Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance. / Kim, Yeon Seok; Lim, Chang Young; Kwon, Min Woo.
2023 Silicon Nanoelectronics Workshop, SNW 2023. Institute of Electrical and Electronics Engineers Inc., 2023. p. 61-62 (2023 Silicon Nanoelectronics Workshop, SNW 2023).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance

AU - Kim, Yeon Seok

AU - Lim, Chang Young

AU - Kwon, Min Woo

PY - 2023

Y1 - 2023

N2 - In this paper, we propose a solution that involves adding a silicon nitride (Si3N4) layer to the spherical shallow trench isolation (STI) structure. By optimizing the spherical STI structure and adding the Si3N4 layer. The addition of Si3N4 is shown to cause a decrease in pass gate effect (PGE) based on the measurement results. The proposed structure reduced the PGE compared to the currently used BCAT structure.

AB - In this paper, we propose a solution that involves adding a silicon nitride (Si3N4) layer to the spherical shallow trench isolation (STI) structure. By optimizing the spherical STI structure and adding the Si3N4 layer. The addition of Si3N4 is shown to cause a decrease in pass gate effect (PGE) based on the measurement results. The proposed structure reduced the PGE compared to the currently used BCAT structure.

UR - http://www.scopus.com/inward/record.url?scp=85167423371&partnerID=8YFLogxK

U2 - 10.23919/SNW57900.2023.10183925

DO - 10.23919/SNW57900.2023.10183925

M3 - Conference contribution

AN - SCOPUS:85167423371

T3 - 2023 Silicon Nanoelectronics Workshop, SNW 2023

SP - 61

EP - 62

BT - 2023 Silicon Nanoelectronics Workshop, SNW 2023

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 26th Silicon Nanoelectronics Workshop, SNW 2023

Y2 - 11 June 2023 through 12 June 2023

ER -

Spherical Shallow Trench Isolation with silicon nitride layer in Buried Gate DRAM for reducing pass gate disturbance

Abstract

Publication series

Conference

Access to Document

Other files and links

Fingerprint

Cite this