Thermomechanical Challenges of 2.5-D Packaging: A Review of Warpage and Interconnect Reliability

Hakjun Kim, Jae Young Hwang, Sarah Eunkyung Kim, Young Chang Joo, Hyejin Jang

Research output: Contribution to journalArticlepeer-review

17 Scopus citations

Abstract

Advanced packaging technology, also known as system scaling, bridges the gap between chip and package sizes by mounting multiple chips on a single package substrate. 2.5-D packaging utilizing a passive device has been widely adopted and showed enhanced capacity and performance. However, 2.5-D packaging presents its own challenges related to thermomechanical reliability because of the large size of the silicon interposer. This article reviews academic and industrial efforts to address the thermomechanical challenges associated with 2.5-D packaging, particularly silicon interposers, focusing on the warpage and board-level interconnect reliability. The topics include simulation and measurement methods to evaluate and predict the thermomechanical characteristics of package components, such as warpage and strain distribution, as well as fatigue and lifetime of ball grid arrays. The impacts of materials and geometrical design factors are also discussed. Finally, challenges of current approaches and outlooks are presented.

Original languageEnglish
Pages (from-to)1624-1641
Number of pages18
JournalIEEE Transactions on Components, Packaging and Manufacturing Technology
Volume13
Issue number10
DOIs
StatePublished - 1 Oct 2023

Keywords

  • 25-D packaging
  • board-level reliability
  • interposer
  • solder fatigue life
  • warpage

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