Tunable Non-Volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse

Tae Hyeon Kim; Omkar Phadke; Yuan Chun Luo; Halid Mulaosmanovic; Johannes Mueller; Stefan Duenkel; Sven Beyer; Asif Islam Khan; Suman Datta; Shimeng Yu

doi:10.1109/LED.2023.3311344

Tunable Non-Volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse

Tae Hyeon Kim
, Omkar Phadke
, Yuan Chun Luo
, Halid Mulaosmanovic
, Johannes Mueller
, Stefan Duenkel
, Sven Beyer
, Asif Islam Khan
, Suman Datta
, Shimeng Yu

Dept. of Semiconductor Engineering

Research output: Contribution to journal › Article › peer-review

42 Scopus citations

Abstract

Using 'capacitive' crossbar arrays for compute-in-memory (CIM) offers higher energy efficiency compared to 'resistive' crossbar arrays. The non-volatile capacitive (nvCap) synapse has been recently reported in MFM and MFS stacks with asymmetric electrode interfaces. In this work, a foundry FeFET is leveraged as the capacitive synapse for the first time, where the tunable gate-to-drain and gate-to-source capacitances (C_gd and C_gs) are exploited as the capacitive memory states. High capacitance on/off ratio (25) is obtained by relatively low program/erase voltages (±3.5V). Furthermore, it is demonstrated by TCAD simulation that the physical origins of on-state and off-state capacitance are dominated by the inversion capacitance and the overlap capacitance, respectively. Based on these results, design guidelines are presented to further increase the on/off ratio.

Original language	English
Pages (from-to)	1628-1631
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	44
Issue number	10
DOIs	https://doi.org/10.1109/LED.2023.3311344
State	Published - 1 Oct 2023

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

compute-in-memory
ferroelectric field-effect transistor
Non-volatile capacitive synapse

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10.1109/LED.2023.3311344

Cite this

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title = "Tunable Non-Volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse",

abstract = "Using 'capacitive' crossbar arrays for compute-in-memory (CIM) offers higher energy efficiency compared to 'resistive' crossbar arrays. The non-volatile capacitive (nvCap) synapse has been recently reported in MFM and MFS stacks with asymmetric electrode interfaces. In this work, a foundry FeFET is leveraged as the capacitive synapse for the first time, where the tunable gate-to-drain and gate-to-source capacitances (Cgd and Cgs) are exploited as the capacitive memory states. High capacitance on/off ratio (25) is obtained by relatively low program/erase voltages (±3.5V). Furthermore, it is demonstrated by TCAD simulation that the physical origins of on-state and off-state capacitance are dominated by the inversion capacitance and the overlap capacitance, respectively. Based on these results, design guidelines are presented to further increase the on/off ratio.",

keywords = "compute-in-memory, ferroelectric field-effect transistor, Non-volatile capacitive synapse",

author = "Kim, \{Tae Hyeon\} and Omkar Phadke and Luo, \{Yuan Chun\} and Halid Mulaosmanovic and Johannes Mueller and Stefan Duenkel and Sven Beyer and Khan, \{Asif Islam\} and Suman Datta and Shimeng Yu",

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doi = "10.1109/LED.2023.3311344",

language = "English",

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T1 - Tunable Non-Volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse

AU - Kim, Tae Hyeon

AU - Phadke, Omkar

AU - Luo, Yuan Chun

AU - Mulaosmanovic, Halid

AU - Mueller, Johannes

AU - Duenkel, Stefan

AU - Beyer, Sven

AU - Khan, Asif Islam

AU - Datta, Suman

AU - Yu, Shimeng

PY - 2023/10/1

Y1 - 2023/10/1

N2 - Using 'capacitive' crossbar arrays for compute-in-memory (CIM) offers higher energy efficiency compared to 'resistive' crossbar arrays. The non-volatile capacitive (nvCap) synapse has been recently reported in MFM and MFS stacks with asymmetric electrode interfaces. In this work, a foundry FeFET is leveraged as the capacitive synapse for the first time, where the tunable gate-to-drain and gate-to-source capacitances (Cgd and Cgs) are exploited as the capacitive memory states. High capacitance on/off ratio (25) is obtained by relatively low program/erase voltages (±3.5V). Furthermore, it is demonstrated by TCAD simulation that the physical origins of on-state and off-state capacitance are dominated by the inversion capacitance and the overlap capacitance, respectively. Based on these results, design guidelines are presented to further increase the on/off ratio.

AB - Using 'capacitive' crossbar arrays for compute-in-memory (CIM) offers higher energy efficiency compared to 'resistive' crossbar arrays. The non-volatile capacitive (nvCap) synapse has been recently reported in MFM and MFS stacks with asymmetric electrode interfaces. In this work, a foundry FeFET is leveraged as the capacitive synapse for the first time, where the tunable gate-to-drain and gate-to-source capacitances (Cgd and Cgs) are exploited as the capacitive memory states. High capacitance on/off ratio (25) is obtained by relatively low program/erase voltages (±3.5V). Furthermore, it is demonstrated by TCAD simulation that the physical origins of on-state and off-state capacitance are dominated by the inversion capacitance and the overlap capacitance, respectively. Based on these results, design guidelines are presented to further increase the on/off ratio.

KW - compute-in-memory

KW - ferroelectric field-effect transistor

KW - Non-volatile capacitive synapse

UR - https://www.scopus.com/pages/publications/85169690882

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DO - 10.1109/LED.2023.3311344

M3 - Article

AN - SCOPUS:85169690882

SN - 0741-3106

VL - 44

SP - 1628

EP - 1631

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 10

ER -

Tunable Non-Volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse

Abstract

UN SDGs

Keywords

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