Abstract
A wireless communication system is required to be implemented with the low power circuits because it uses a battery having a limited energy. Therefore, the current mode circuit has been studied because it consumes constant power regardless of the frequency change. However, the clock-feedthrough problem is happened by leak of stored energy in memory operation. In this paper, we suggest the current memory circuit to minimize the clock-feedthrough problem and introduce a technique for ultra low power operation by inducing dynamic voltage scaling. The current memory circuit was designed with BSIM3 model of 0.35μm
process and was operated in the near-threshold region. From the simulation result, the clock-feedthrough could be minimized when designing the memory MOS Width of 2μm
, the switch MOS Width of 0.3μm
and dummy MOS Width of 13μm
in 1MHz switching operation. The power consumption was calculated with 3.7μW
at the supply voltage of 1.2 V, near-threshold voltage.
process and was operated in the near-threshold region. From the simulation result, the clock-feedthrough could be minimized when designing the memory MOS Width of 2μm
, the switch MOS Width of 0.3μm
and dummy MOS Width of 13μm
in 1MHz switching operation. The power consumption was calculated with 3.7μW
at the supply voltage of 1.2 V, near-threshold voltage.
| Translated title of the contribution | Design of Low Power Current Memory Circuit based on Voltage Scaling |
|---|---|
| Original language | Korean |
| Pages (from-to) | 159-164 |
| Number of pages | 6 |
| Journal | 한국전자통신학회 논문지 |
| Volume | 11 |
| Issue number | 2 |
| DOIs | |
| State | Published - Feb 2016 |